Time slot interchanger and digital communications terminal for ISDN D-channel assembly
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United States of America Patent
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Dec 14, 1999
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N/A
app pub date -
Dec 4, 1996
filing date -
Dec 4, 1996
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Abstract
The invention comprises a time slot interchanger and method for multiplexing ISDN D-channel signals into multiplexed signals in a digital communications terminal. The method comprises receiving a frame of communication signals wherein some of the communication signals represent ISDN D-channel signals wherein each ISDN D-channel signal is represented by a first number of data bits and a second number of other bits. A first copy of the frame of communication signals is stored in a first memory while a second copy of the frame of communication signals is stored in a second memory during a first frame period. During a second frame period, at least some of the stored communication signals are retrieved from the first memory and at least some of the stored communication signals are retrieved from the second memory. Multiplexed signals are then assembled wherein at least one multiplexed signal comprises a multiplexed combination of the data bits of ISDN D-channel signals retrieved from the first and second memories.
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