Semiconductor device for controlling a delay time of an output signal of a PLL
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United States of America Patent
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Nov 30, 1999
Grant Date -
N/A
app pub date -
Jan 28, 1997
filing date -
Aug 27, 1996
priority date (Note) -
Expired
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Abstract
It is an object to obtain a semiconductor device capable of changing a delay time of an output signal of a PLL circuit with respect to an external clock signal after installed in a system. An external clock signal is inputted to an input terminal (1.) An address value is inputted to an input terminal (3.) A decoder (9) selects one of a plurality of delay times in a voltage-controlled oscillator (8) according to the address value. The phase of a signal outputted to an output terminal (2) is delayed with respect to the external clock signal at the input terminal (1) by the delay time selected. Accordingly, it is possible to change the delay time of the output signal of the PLL circuit with respect to the external clock signal after installation in a system.
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