Fabrication method of T-shaped gate electrode in semiconductor device
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United States of America Patent
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Oct 19, 1999
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N/A
app pub date -
Oct 30, 1997
filing date -
Dec 21, 1996
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Abstract
A method for fabricating a T-shaped gate electrode of a high speed semiconductor device such as HEMTs which is applied to high speed logic circuit including low-noise receivers and power amplifiers having a frequency of X-band or more respectively, and MMICs having a frequency of millimeter wave band. Such devices require a short gate length and a large sectional area of the gate pattern. The conventional photolithography techniques are in need of the resolution for fabricating a fine line width. Therefore, electron-beam lithography is most widely used. But, it is difficult to enhance throughput in manufacturing semiconductor devices because a lot of exposure time is required in the methods using electron beams. In the present invention, a silicon oxide film or a silicon nitride film is deposited on a mono-layered resist pattern. A dummy pattern corresponding to a leg of the gate is formed using the silicon oxide film or the silicon nitride film. A leg of the gate electrode is formed at the portion of the dummy pattern. According to the present invention, a step for improving the resolution is not required, and a gate electrode having a very fine line width of a few hundreds .ANG. can be obtained by regulating the thickness of the silicon nitride film.
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