System for coupling programmable logic device to external circuitry which selects a logic standard and uses buffers to modify output and input signals accordingly
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United States of America Patent
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Oct 19, 1999
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N/A
app pub date -
Oct 16, 1995
filing date -
Oct 16, 1995
priority date (Note) -
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Abstract
A programmable input/output device for use with a programmable logic device (PLD) is presented comprising an input buffer, an output buffer and programmable elements. The programmable elements may be programmed to select a logic standard for the input/output device to operate at. For instance, a given set of Select Bits applied to the programmable elements may select TTL logic, in which case the input and output buffers would operate according to the voltage levels appropriate for TTL logic (e.g., 0.4 volts to 2.4 volts). For a different set of Select Bits, the GTL logic standard would be applied (e.g., 0.8 volts to 1.2 volts). The invention enables a single PLD to be used in conjunction with various types of external circuitry.
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