Apparatus and method for programming PMOS memory cells
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United States of America Patent
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Oct 12, 1999
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N/A
app pub date -
Oct 9, 1997
filing date -
Oct 9, 1997
priority date (Note) -
Expired
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Abstract
A program voltage of a first level is applied to the control gate of a PMOS floating gate memory cell to realize an injection of hot electrons induced by band-to-band tunneling (BTBT) into the floating gate of the cell. As the threshold voltage of the cell increases due to the accumulation of charge on the floating gate, the injection of BTBT induced hot electrons subsides. The program voltage is reduced to a second level which induces the injection of channel hot electrons (CHE) into the floating gate, thereby boosting the rate of charge accumulation on the floating gate.
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