Fabrication method of CMOS device having buried implanted layers for lateral isolation (BILLI)
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United States of America Patent
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Oct 5, 1999
Grant Date -
N/A
app pub date -
Jun 25, 1997
filing date -
Jun 29, 1996
priority date (Note) -
Expired
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Abstract
A method for fabricating a CMOS device having BILLI (buried implanted layers for lateral isolation) structure capable of effectively preventing latch-up is disclosed, having the following steps. A mask pattern is formed on the semiconductor substrate of a predetermined conductivity type to expose a region where the MOS transistor, having a same conductivity type as that of the substrate, is to be formed wherein the mask pattern has a vertical boundary face having a gradual slope. A buried layer is then formed in the form of island by ion-implanting the impurity ions into the substrate to pass through the mask pattern, the buried layer having a same conductivity type as that of the substrate, and being formed to be continuous under the vertical boundary face of the mask pattern.
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