Importance

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Abstract

The present invention relates to a contact structure not only for a semiconductor device having a hetero-junction bipolar transistor or a hetero-insulated gate field effect transistor but also for semiconductor devices at large. In a semiconductor layer of a polycrystalline or amorphous undoped III-V compound semiconductor or an alloy thereof, a through hole is formed for contact. The size of the through hole is set to permit exposure of at least part of a first conductor layer and a dielectric layer, such as an Si compound, present around the first conductor layer, and a second conductor layer is formed within the through hole so as to contact the first conductor layer. Since the semiconductor layer can be subjected to a selective dry etching for the dielectric layer, the dielectric layer is not etched at the time of forming the above through hole in the semiconductor layer. As a result an electric short-circuit of the second conductor layer with a single crystal semiconductor layer which underlies the dielectric layer can be prevented.

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First Claim