Thermally enhanced integrated circuit packaging system

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United States of America Patent

PATENT NO 5939781
SERIAL NO

08721138

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ATTORNEY / AGENT: (SPONSORED)

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Abstract

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The present invention is a thermally enhanced integrated circuit packaging system that can be produced using standard assembly tooling and equipment and that provides increased heat dissipation with little or no additional cost. The present invention provides novel enhanced internal and external thermal pathways from the die to the ambient. In one embodiment, unused and grounded leads are joined internally by webs between individual leads, forming a wide heat conduction path which is directly connected to the die pad. This heat conduction path enhances heat flow from the die to the exterior of the integrated circuit package. In addition, a second set of webs joins the leads at their exterior ends, providing an enhanced thermal path externally from the integrated circuit package to the printed circuit board, and from there to the ambient environment. In another embodiment of the invention, heat dissipation from the integrated circuit package is further enhanced by mounting it on a printed circuit board comprising a ground plane to which the webbed external leads are directly connected. Because of the increased heat transfer between the integrated circuit die and the printed circuit board provided by the present invention, the ground plane on the printed circuit board acts as a heat sink, dissipating heat conducted to the ground plane through the webbed leads. The present invention is fabricated using the same tools and equipment as standard, unenhanced integrated circuit packaging.

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Patent Owner(s)

Patent OwnerAddress
SILICON SYSTEMS INCSUITE 220 2460 N FIRST STREET SAN JOSE CA 95131

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Lacap, Efren M Tustin, CA 14 140

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