Dynamic scheduler for time multiplexed serial bus
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United States of America Patent
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Aug 3, 1999
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N/A
app pub date -
Jun 23, 1997
filing date -
Jun 23, 1997
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Abstract
Method and apparatus for improving bus utilization on a bus having a tiered topology, by estimating the worst-case transaction duration time for executing a transaction. The sum of three delays D.sub.fixed, D.sub.data and D.sub.hub.sbsb.--.sub.depth, is detemined, where D.sub.fixed is a delay component which can depend on the transmission duration type of the transaction, as well as other fixed delays; D.sub.data is a delay component which depends on a number N.sub.bytes of bytes to be transmitted for the transaction, and D.sub.hub.sbsb.--.sub.depth is a delay component which depends (in one aspect) on the actual maximum hub depth in the bus topology, or which depends (in another aspect) on the actual hub depth of the target device.
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