Process improvements in self-aligned polysilicon MOSFET technology using silicon oxynitride

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United States of America Patent

PATENT NO 5930627
SERIAL NO

08851403

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Abstract

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Silicon enriched silicon oxynitride is used in applications both as an independent etch stop and as a cap layer and sidewall component over polysilicon gate electrodes in order to prevent insulator thinning and shorts caused by a mis-aligned contact mask. In one embodiment a silicon enriched silicon oxynitride layer is placed over a polysilicon gate with conventional sidewalls and insulative cap. In another embodiment the insulative cap and the sidewalls are formed of a silicon enriched silicon oxinitride. Etching of contact openings in the subsequently deposited insulative layer is suppressed by the silicon enriched silicon oxynitride if it is engaged because of a mis-aligned contact mask. In another embodiment a polysilicon stack edge of a memory device is protected by a conformal silicon oxynitride layer during etching of a self-aligned-source (SAS) region. These embodiments are accomplished with minimal and virtually negligible increase in process complexity or cost.

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Patent Owner(s)

Patent OwnerAddress
CHARTERED SEMICONDUCTOR MANUFACTURING PTE LTD60 WOODLANDS INDUSTRIAL PARK D STREET 2 SINGAPORE 738406

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Chiu, Wing Hong Singapore, SG 1 36
Li, Jian Xun Singapore, SG 17 196
Loong, Sheau-Tan Singapore, SG 2 56
Tan, Koon Lay Denise Singapore, SG 1 36
Tang, Kok Hiang Stephanie Singapore, SG 1 36
Zhou, Mei Sheng Singapore, SG 133 2512

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