Chalcogenide memory cell with a plurality of chalcogenide electrodes
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United States of America Patent
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Jul 6, 1999
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N/A
app pub date -
Dec 16, 1997
filing date -
Jun 7, 1995
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Abstract
A chalcogenide memory cell with chalcogenide electrodes positioned on both sides of the active chalcogenide region of the memory cell. The chalcogenide memory cell includes upper and lower chalcogenide electrodes with a dielectric layer positioned therebetween. The dielectric layer includes an opening defining a pore. A volume of chalcogenide material formed integral to the upper chalcogenide electrode is contained within the pore. The upper and lower chalcogenide electrodes both have greater cross sectional areas than the pore.
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