Semiconductor device and memory system
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United States of America Patent
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May 11, 1999
Grant Date -
N/A
app pub date -
Mar 17, 1997
filing date -
Mar 18, 1996
priority date (Note) -
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Abstract
A semiconductor memory device comprises a memory cell array having electrically erasable and programmable memory cells arranged in rows and columns, each memory cell capable of storing n-value data (n is 3 or a greater natural number), and a data circuit having m latch circuits for holding data items read from said memory cells, wherein data items read from said memory cells and held in k latch circuits (k
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