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Abstract

A CMOS imaging system provides low noise read out and amplification for an array of passive pixels, each of which comprises a photodetector, an access MOSFET, and a second MOSFET that functions as a signal overflow shunt and a means for electrically injecting a test signal. The read out circuit for each column of pixels includes a high gain, wide bandwidth, CMOS differential amplifier, a reset switch and selectable feedback capacitors, selectable load capacitors, correlated double sampling and sample-and-hold circuits, an optional pipelining circuit, and an offset cancellation circuit connected to an output bus to suppress the input offset nonuniformity of the amplifier. For full process compatibility with standard silicided submicron CMOS and to maximize yield and minimize die cost, each photodiode may comprise the lightly doped source of its access MOSFET. Circuit complexity is restricted to the column buffers, which exploit signal processing capability inherent in CMOS. Advantages include high fabrication yield, broadband spectral response from near-UV to near-IR, low read noise at HDTV data rates, large charge-handling capacity, variable sensitivity with simple controls, and reduced power consumption.

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First Claim