Signal receiving circuit and digital signal processing system

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United States of America Patent

PATENT NO 5880601
SERIAL NO

08750581

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Abstract

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A signal receiving circuit comprising a first P-channel MOSFET amplifier and a first N-channel MOSFET amplifier having gates supplied with positive signals from a pair of signal transmission lines; and a second P-channel MOSFET amplifier and a second N-channel MOSFET amplifier having gates supplied with negative signals from said pair of signal transmission lines; wherein a first output signal is formed by so adjusting the gains of the first P-channel MOSFET amplifier and of the second N-channel MOSFET amplifier that the resultant signals have an intermediate amplitude between the operation voltages, and a second output signal is formed by so adjusting the gains of the second P-channel MOSFET amplifier and of the first N-channel MOSFET amplifier that the resultant signals have an intermediate amplitude between the operation voltages. This makes it possible to receive various small signals lying over a wide range even by using a sense amplifier which has only a fixed operation range in the signal receiving circuit as well as to constitute a novel and optimum system by combining semiconductor integrated circuit devices having different low-amplitude interfaces.

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Patent Owner(s)

Patent OwnerAddress
HITACHI LTDCHIYODA-KU TOKYO 100-8280
HITACHI COMMUNICATION SYSTEMS INC180 TOTSUKACHO TOTSUKA-KU YOKOHAMA

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ito, Kunihiro Ome, JP 15 122
Kanazawa, Nobuaki Yokohama, JP 10 119
Mizukami, Masao Yokohama, JP 21 645

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