Single chip microcontroller having down-loadable memory organization supporting "shadow" personality, optimized for bi-directional data transfers over a communication channel
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United States of America Patent
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Jan 12, 1999
Grant Date -
N/A
app pub date -
Apr 24, 1997
filing date -
Apr 24, 1997
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Abstract
A microcontroller down-loadable memory organization supporting 'shadow' personality, optimized for connecting a computer system to an ISDN network to facilitate transmitting and receiving of data, the microcontroller including a processor and a memory structure having ROM memory space for storing program code therein and further including a dual port RAM for connection between the computer and the processor, the dual port RAM having RAM memory space for storing program code therein and shared RAM for storing data capable of being simultaneously accessible by the processor and the computer, wherein the program ROM and the program RAM are selectively used by the computer to store program code by the computer using a ROM/RAM* select signal, and wherein the starting address in the shared RAM wherein data is stored is selectably offset from the starting address of the code RAM and the code ROM.
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