Double sided interdiffusion process and structure for a double layer heterojunction focal plane array
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United States of America Patent
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Dec 8, 1998
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N/A
app pub date -
Sep 5, 1996
filing date -
Sep 5, 1995
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Abstract
This invention relates to a process and structure for performing a high temperature or other process on both sides of a thin slice of material or die prior to being placed onto a integrated circuit or multi-chip module. In a particular embodiment, a process and structure is given to provide for double sided interdiffusion for passivation of a Mercury Cadmium Telluride (MCT) film which is mounted to a read-out integrated circuit (ROIC) face side up in order to fabricate vertically integrated Focal Plane Arrays (FPAs) with reduced dark currents and improved performance. The process of the present invention also allows for the insertion of novel materials such as Double Layer Heterojunction (DLHJ), MBE, MOCVD, etc. in the vertical integrated approach to FPAs.
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