Parallel processing system including arrangement for establishing and using sets of processing nodes in debugging environment

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United States of America Patent

PATENT NO 5805890
SERIAL NO

08441234

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Abstract

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A debugger for use in connection with a parallel computer including a plurality of processing nodes. The debugger enables the operator to establish a processing node set in response to certain criteria, such as the respective identifications of the processing node and their prior processing under the debugger. The debugger, in response to a processing node set establishment command from the operator, enables each processing node to establish and condition a set membership flag in response to the operator-supplied set membership criteria. The debugger is then responsive to a debugging command from the operator to enable the processing nodes to use their respective set membership flags to condition their execution of the debugging command.

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Patent Owner(s)

Patent OwnerAddress
THINKING MACHINES CORPORATION14 CROSBY DRIVE BEDFORD MA 01730

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Jourdenais, Karen C Concord, MA 7 202
Simons, Joshua E Sharon, MA 6 110
Sistare, Steven J Arlington, MA 13 367

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