Transistor ratio controlled CMOS transmission line equalizer
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United States of America Patent
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Sep 8, 1998
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app pub date -
Sep 3, 1996
filing date -
Sep 3, 1996
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Abstract
A CMOS transmission line equalizer is provided for receiving distorted signals transmitted through a transmission line and for compensating for the signal distortion. The equalizer has a transfer function characteristic with a single pole and a single zero. The transfer function includes a mirroring ratio circuit (CMR) for controlling the ratio between the single pole and the single zero. The mirroring ratio circuit is controlled by transistor size ratio. The single zero serves to cancel the dominant pole in the transfer function of the transmission line so as to compensate for the signal distortion caused by the transmission line.
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