Process for producing semiconductor integrated circuit
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United States of America Patent
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Jul 14, 1998
Issued Date -
N/A
app pub date -
Apr 7, 1997
filing date -
Jul 11, 1995
priority date (Note) -
Expired
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Abstract
When the source and drain regions (an n.sup.- type semiconductor region and an n.sup.+ type semiconductor region) of a complementary MISFET and a p-type semiconductor region for use as a punch-through stopper are formed in a p-type well in a substrate having a p- and an n-type well, p-type impurities for the punch-through stopper are suppressed from being supplied to the feeding portion (an n.sup.+ type semiconductor region) of the n-type well.
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