Multiple bank structured memory access device having flexible setting of a pipeline stage number
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United States of America Patent
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Jun 16, 1998
Issued Date -
N/A
app pub date -
Apr 22, 1996
filing date -
May 20, 1991
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A memory access device including a memory unit having a plurality of independently accessible banks and a pipeline stage number setting unit for setting the number of the pipeline stages in a pipeline operation for accessing the next-to-be-accessed one of the plurality of independently accessible banks before completing an access to a currently accessed one of the plurality of independently accessible banks. The number of banks accessed is not more than the number of the plurality of banks. A unit is provided for generating an address of the next-to-be-accessed one of the plurality of independently accessible banks and for switching a bank from the currently used one of the plurality of independently accessible banks to the next-to-be-accessed one of the plurality of independently accessible banks in accordance with the number of the pipeline stages set by the pipeline stage number setting unit.
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