Data processing system provided with an address translation lookaside buffer capable of quick partial purge operation
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United States of America Patent
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Jan 20, 1998
Grant Date -
N/A
app pub date -
Mar 9, 1995
filing date -
Mar 10, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data processing system capable of simultaneously processing a plurality of partial purge requests stored in a purge address stack and of reducing the effective time necessary for carrying out a partial purge process for the partial purging of an address translation lookaside buffer is disclosed. The data processing system comprises a purge address stack (106) having a plurality of registers (106a to 106d) for storing a plurality of partial purge requests, a plurality of comparators (109a to 109d) associated with the registers of the purge address stack respectively and functioning for both gaining normal access to an address translation lookaside buffer and carrying out a partial purge process, and a comparator (110) to be used when an address translator (107) operates. The partial purge process is started when the purge address stack becomes full or when a real address portion determined by the address translator (107) coincides with any one of the real address portions stored in the registers of the purge address stack.
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