Fail-safe method to read a timer which is based on a particular clock with another asynchronous circit

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United States of America Patent

PATENT NO 5703919
SERIAL NO

08633671

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Abstract

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A method and apparatus for reading a timer with an asynchronous circuit. A computer system is provided having a system clock and an asynchronous timer clock. The computer system includes a counter clocking from the timer clock and a latch coupled to output of the counter. First logic, synchronized to the timer clock, is coupled to control the latch responsive to a control signal from the computer system. Second logic synchronized to the system clock and coupled to the first logic is configured to provide an indication to the computer system of when the system can read the latched data and be assured of its validity. The computer system will thereby be prevented from reading the timer before it has stabilized.

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Patent Owner(s)

Patent OwnerAddress
ADVANCED MICRO DEVICES INC2485 AUGUSTINE DRIVE SANTA CLARA CA 95054

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Bailey, Joseph A Austin, TX 23 692
Qureshi, Qadeer A Round Rock, TX 32 741

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