Importance

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Abstract

The present invention relates to an electrical bypass timer circuit for temporarily disabling a delay feature which would otherwise prevent activation of a system until the delay has lapsed. During the period that the bypass timer circuit is active, the delay feature is overridden, allowing the system to be activated. After the bypass timer circuit has deactivated, the delay feature becomes operative, preventing activation of the system until the delay has lapsed. The bypass timer circuit can be used with any system where a delay is desired prior to system activation, to eliminate that delay when permitted by system operating characteristics. The bypass timer circuit can take the form of a software-driven computer processor, a solid-state digital logic control network, or a network of discrete electrical components incorporating a timing function. One preferred embodiment of the invention is designed for an internal combustion engine pre-lubrication system, and uses a network of discrete resistors and capacitors that electrically discharges within a set time period determined by the circuit configuration and the physical characteristics of the resistors and capacitors incorporated into the network. This embodiment of the bypass timer circuit is electrically connected to the system and to the delay circuitry to cause an override of the delay circuitry during the period that the resistor-capacitor network is undergoing discharge. During the discharge period, this override of the delay circuitry permits the system starting circuitry to receive an enabling signal which activates the system. After the discharge has ended, the delay circuitry takes effect to prevent the receipt of the enabling signal by the system starting circuitry until the delay has lapsed.

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First Claim