Low-jitter, non-slip clock generator
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United States of America Patent
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Dec 2, 1997
Grant Date -
N/A
app pub date -
Nov 28, 1995
filing date -
Nov 28, 1995
priority date (Note) -
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Abstract
A clock signal generator for converting a high speed clock signal to a low speed clock signal, the generator including a first counter receiving the high speed clock signal and counting the cycles thereof, the first counter being configured to count to a first preselected value and then generate an output signal indicating when the first preselected value is reached; a second counter receiving the high speed clock signal and counting the cycles thereof, the second counter being configured to count to a second preselected value and then generate an output signal indicating when the second preselected value is reached, wherein the first and second preselected values are different; and an m-state controller receiving the output signals from the first and second counters and generating the low-speed clock signal therefrom, the m-state generator periodically outputting a reset signal to reset the first and second counters to restart counts in each of those counters.
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