Process for the laminar joining of silicon semiconductor slices

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United States of America Patent

PATENT NO 5693574
SERIAL NO

08192329

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Abstract

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A process for the laminar joining of two or more silicon semiconductor slices (wafers) under the effect of pressure and heat, in which a thin layer of a semiconductor-compatible material is applied to at least one of the surfaces to be joined.

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Patent Owner(s)

Patent OwnerAddress
DEUTSCHE AEROSPACE AG PATENTEPOSTFACH 80 11 09 D-81663 MUENCHEN

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Panitsch, Klaus Kirchheim, DE 1 28
Schuster, Gunther Gammelshausen, DE 4 109

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