Multilayer antifuse with low leakage and method of manufacture therefor
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United States of America Patent
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Oct 28, 1997
Grant Date -
N/A
app pub date -
Mar 31, 1994
filing date -
Mar 31, 1994
priority date (Note) -
Expired
status (Latency Note)
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Abstract
The present invention provides for an antifuse in an integrated circuit, which has a stacked antifuse structure on a first interconnection line. The stacked structure has a first programming layer of amorphous silicon on the first interconnection line, a very thin insulating layer of silicon dioxide on the first programming layer, and a second programming layer of amorphous silicon on the very thin oxide layer. A second interconnection line on the second programming layer completes the antifuse which has a low leakage current between the first and second interconnection lines.
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