Semiconductor memory having redundancy circuit
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United States of America Patent
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Oct 14, 1997
Grant Date -
N/A
app pub date -
Mar 21, 1995
filing date -
Nov 16, 1990
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
In a semiconductor memory, switch circuits are provided so as to inhibit voltage and signal supplies to each of the normal memory blocks when so required. On the other hand, a ROM is provided on the chip so as to store the address of a defective memory block which consumes an excessively large stand-by current when the semiconductor memory is in the stand-by mode. The switch circuits are controlled by the output of the ROM so as to inhibit the voltage and signal supply to the defective memory block. Then, a spare memory block which is substituted for the defective normal memory block receives the voltage and signal supply.
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