Method and apparatus for aligning the operation of a plurality of processors
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United States of America Patent
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Sep 30, 1997
Grant Date -
N/A
app pub date -
Nov 23, 1994
filing date -
Feb 2, 1988
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A method and apparatus are disclosed for aligning a plurality of multi-processors. The apparatus preferably comprises an alignment unit associated with each processor and a logic network for combining the output of the alignment unit and for broadcasting information to these units. Alignment is achieved by inserting in the instruction stream from each processor that is to be aligned a request for alignment, by testing for prior completion of any instructions that must be completed and by causing all processors to wait until they have all made the request for alignment and completed necessary prior instructions. The alignment unit associated with each processor monitors the instruction stream to detect a request for alignment. The logic network illustratively is an array of AND gates that tests each alignment unit to determine if it has detected a request for alignment. When all the units have made such a request, the logic network informs the alignment units; and the alignment units inform the processors.

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Patent Owner(s)
Patent Owner | Address | |
---|---|---|
TM PATENTS L P | C/O CT CORPORATION SYSTEM 1209 ORANGE ST WILMINGTON DE 19801 |
International Classification(s)
Inventor(s)
Inventor Name | Address | # of filed Patents | Total Citations |
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Hillis, W Daniel | Brookline, MA | 503 | 14393 |
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Fee | Large entity fee | small entity fee | micro entity fee | due date |
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Fee | Large entity fee | small entity fee | micro entity fee |
---|---|---|---|
Surcharge after expiration - Late payment is unavoidable | $700.00 | $350.00 | $175.00 |
Surcharge after expiration - Late payment is unintentional | $1,640.00 | $820.00 | $410.00 |
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