Sea-of-cells array of transistors
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United States of America Patent
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Sep 23, 1997
Issued Date -
N/A
app pub date -
May 31, 1995
filing date -
Dec 27, 1993
priority date (Note) -
Expired
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Abstract
The invention concerns integrated circuits in which a MACRO is embedded in a standard cell array. One level of metal is devoted exclusively to non-local interconnect, and a layer of polysilicon is devoted to local interconnect, thereby saving significant space.
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