Method of planarizing a layer of material

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United States of America Patent

PATENT NO 5668063
SERIAL NO

08447809

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Abstract

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A method of planarizing a layer of material having a pre-determined thickness above a circuit feature on a semiconductor device is provided. A first layer of material is formed atop the surface of the semiconductor substrate and circuit feature to a pre-determined thickness. A thin, continuous trace layer of doped silicon oxide material is formed atop the first layer, and then a second layer of material is formed atop the trace layer. The second layer is planarized, and planarization is terminated upon reaching the trace layer, thereby providing a semiconductor with a planar layer.

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Patent Owner(s)

Patent OwnerAddress
SILICON VALLEY GROUP THERMAL SYSTEMS LLC440 KINGS VILLAGE ROAD SCOTTS VALLEY CA 95066

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Fry, Howard Wallace Scotts Valley, CA 1 34
Lightfoot, Kurt James Ben Lomond, CA 1 34

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