Apparatus for computing delay time of integrated circuit
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United States of America Patent
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Sep 2, 1997
Grant Date -
N/A
app pub date -
Dec 7, 1994
filing date -
Dec 28, 1993
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Abstract
A delay time computing apparatus includes a data base for storing data on various cells, an input device operable by a designer, and a processing unit coupled to the data base and the input device. The processing unit includes a data input interface, a path building section and a delay time computing section. The data input interface controls transfer of input data from the input device. The path building section reads detailed data on a selected cell from the data base in accordance with circuit redesign data input by a circuit designer to the data input device, and thereby constructs a signal propagation path for cells involved in circuit redesign. Every time the path building section constructs new signal propagation paths, the delay time computing section computes delay times of cells involved in circuit redesign.
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