Method and apparatus for indicating a time-out by generating a time stamp for an input/output (I/O) channel whenever the channel processes an instruction
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United States of America Patent
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Jul 22, 1997
Issued Date -
N/A
app pub date -
Apr 25, 1996
filing date -
Dec 18, 1992
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Abstract
A channel time-out apparatus in a data processing system having a channel processor for controlling the allocation of a plurality of input/output channels. The channel time-out apparatus comprises a clock for generating time indications, an address generator for generating an address for each input/output channel of the plurality of input/output channels, a time-out generator for generating a time-out indicator for an input/output channel whenever that input/output channel processes an instruction, storage for storing the last time-out indicator generated by the time-out means for each input/output channel and a comparator for comparing the last time-out indicator stored in the storage for the input/output channel whose address is presently being generated by the address generator with a time indicator presently being generated by the clock for determining when a time-out event has occurred without requiring intervention by the processor.
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