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Abstract

A method is disclosed to execute an event driven logic simulation to check the function of a logic circuit, by using a logic simulator. The logic simulator includes at least one data base and a processing unit having a dummy element synthesizer. The dummy element is a tool for detecting changes in signals at a target cell or a target terminal. At the time that the logic simulation starts, the dummy element synthesizer produces the dummy element defining data, referring to or based on information stored in the data base, and combines the dummy element defining data and the logic circuit design data. Thus, for example, timing simulation at a target cell in the logic circuit or the check of the number of times of changes in signals at a target output terminal of the logic circuit, is executed during the event driven logic simulation.

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