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Abstract

Binary bits of least binary significance are converted to a corresponding analog output. Binary bits of increased binary significance are converted to a first plurality of thermometer outputs. A plurality of switching assemblies, each preferably recursive and preferably formed from a plurality of switches (e.g. transistors), process individual pairs of successive ones of such thermometer outputs. Each stage respectively produces first or second outputs or the analog output for first, second and third relationships between the thermometer outputs in such pair. The analog output has a variable value between the first and second outputs depending upon the value of the least significant binary bits. When the binary value is represented only by the binary bits of least and increased binary significance, the first, second and analog outputs are combined to produce an analog output representative of such binary bits. When the binary value additionally includes binary bits of even greater binary significance, an additional decoder decodes such binary bits to produce a second plurality of thermometer outputs. Second pluralities of switching assemblies, each plurality preferably having a construction corresponding to that of the first plurality, receive individual pairs of the thermometer outputs in the second plurality and produce the first or second outputs or an individual one of the outputs in the first plurality. These thermometer outputs are combined to produce an analog output representative of all of the binary bits. The second pluralities of switching assemblies comprise a number corresponding to the number of thermometer outputs in the second plurality.

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