Data rate conversion circuit
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United States of America Patent
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May 27, 1997
Grant Date -
N/A
app pub date -
Sep 29, 1995
filing date -
Sep 29, 1995
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A data conversion circuit that acts as an interface between components or systems having different data input/output rate requirements. A circuit reads data transmitted at one bit rate and transmits data consisting of the input data along with overhead data interleaved with the input data in a fixed pattern at a faster bit rate. Also disclosed is a circuit that operates to read data at a faster bit rate and transmit data consisting of the input data stripped of interleaved overhead data at a slower bit rate. Data is written into and read from a register array that allows data to be concurrently and independently written and read. A suitable delay is introduced on the output side in order to avoid read/write collisions in the register array and achieve a minimum transmission delay.
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