Controlled turn-off power semiconductor device
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United States of America Patent
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Apr 29, 1997
Issued Date -
N/A
app pub date -
May 26, 1995
filing date -
Nov 29, 1990
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Expired
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Abstract
A controlled turn-off power semiconductor device is proposed which is subdivided into unit cells and which comprises five layers in a p-n-p-n-p sequence, namely a p-type emitter layer (9), an n-type base layer (8), a p-type base layer (7), an n-type emitter layer (6) and a p-doped contact region (5) between an anode (a) and a cathode (K). In every unit cell a first MOSFET (M1) which can be driven via a first insulated gate (G1) is provided on the cathode side for switching between the five-layer structure and a conventional thyristor four-layer structure. Further, a breakdown between the contact region (5) and the n-type emitter layer (6) is prevented during turning-off. As a result of the switchable five-layer structure, a current filamentation is effectively avoided during turning-off.
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