Preprogramming testing in a field programmable gate array
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United States of America Patent
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Apr 22, 1997
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N/A
app pub date -
Aug 3, 1994
filing date -
Dec 3, 1991
priority date (Note) -
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Abstract
A field programmable gate array integrated circuit which has numerous features for testing prior to programming the antifuses in the integrated circuit is provided. The circuits used to program the antifuses are also used for much of the preprogramming testing. The functionality of continuous series transistors and latch logic blocks may be tested together with the continuity of their programmable connections. Programmable input/output buffer circuits and clock circuits which set the desired clock network paths may be tested with signals on a serial scan path which passes through the input/output buffer circuits and clock circuits. Process characterization tests without the requirement of high-speed test equipment are also provided.
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