Arbitration circuit capable of changing the priority and arrival time of nonselected requests
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United States of America Patent
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Apr 1, 1997
Grant Date -
N/A
app pub date -
Jun 9, 1993
filing date -
Jun 10, 1992
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A parallel computer network wherein an arbitration circuit for performing arbitrating operation over a plurality of processing requests at the same time at high speed is provided in a crossbar network control circuit to thereby prevent the processing requests not selected from being kept awaited for a long time. The arbitration circuit includes a priority bit change circuit which has a plurality of adders for adding a preset value to the priority information of the each awaited processing request and also has a plurality of comparators for detecting the requests being awaited.
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