Semiconductor integrated circuit device and fabrication method thereof

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United States of America Patent

PATENT NO 5616520
SERIAL NO

08367490

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Abstract

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A semiconductor device is fabricated by forming first metal balls on electrode pads of a semiconductor chip. The first metal balls each can have a sharp tipped anchor. All of the anchors simultaneously flattened slightly only to the extent of equalizing the height thereof. The first metal balls are bonded to electrodes formed on a substrate with wirings by embedding the anchors into the electrodes. Alternatively, second metal balls can be formed on the electrodes which are then flattened to equalize the height thereof. The first metal balls, either with or without the anchors, are bonded to the second metal balls. The first and second metal balls are preferably heated during the bonding step to soften the second metal balls.

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Patent Owner(s)

Patent OwnerAddress
RENESAS ELECTRONICS CORPORATION135-0061 TOKYO

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Kamada, Chiyoshi Kokubunji, JP 10 312
Nakazato, Norio Chiba, JP 29 1028
Nishiuma, Masahiko Ohme, JP 3 188
Suwa, Motoo Koganei, JP 43 570
Takahashi, Hiroyuki Tachikawa, JP 707 15645

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  • 46 Citation Count
  • H01L Class
  • 89.17 % this patent is cited more than
  • 28 Age
Citation count rangeNumber of patents cited in rangeNumber of patents cited in various citation count ranges2039226214669482313771001 - 1011 - 2021 - 3031 - 4041 - 5051 - 6061 - 7071 - 8081 - 90100 +0255075100125150175200225250275300325350375400425

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