Testability circuits for logic circuit arrays
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United States of America Patent
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Mar 25, 1997
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N/A
app pub date -
Sep 8, 1994
filing date -
Jan 28, 1991
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Abstract
A circuit for providing 100% observability and controllability of inputs and outputs of any function circuit module in an array of function circuit modules includes circuitry for placing a test data bit into a selected one of any of the function circuit modules, and circuitry for reading the output of a selected one of any of the function circuit modules.
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