Edge triggered sample and hold circuit and circuits constructed from same
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United States of America Patent
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Mar 4, 1997
Issued Date -
N/A
app pub date -
Mar 24, 1995
filing date -
Jun 12, 1991
priority date (Note) -
Expired
status (Latency Note)
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Abstract
An Operational Analog to Digital (SYMAD) Convertor cell for converting an analog signal into a discrete binary code. An analog signal is processed by sample and hold circuitry and then compared to a reference voltage by a comparator. The comparator output is the converted digital output. This output is coupled back to the control input of an analog switch which selects either the reference voltage or a predetermined potential, typically zero volts, to couple to an inverting input of an operational amplifier. The analog signal input is also coupled to the non-inverting input of the operational amplifier. The operational amplifier is configured as a differential amplifier with a gain of two. If the digital output of the comparator is a logic 1, then the operational amplifier output is two times the difference between the analog signal and the reference voltage. If the digital output of the comparator is a logic 0, then the output of the operational amplifier is two times the analog signal. As many SYMAD cells as necessary may be provided to obtain a desired resolution.
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