Image cell for an image-recorder chip, for protection of high input signal dynamics onto reduced output signal dynamics
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United States of America Patent
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Mar 4, 1997
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N/A
app pub date -
Jun 26, 1995
filing date -
Mar 24, 1992
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Abstract
Disclosed is an image-recorder chip having a multiplicity of image cells provided with field-effect transistors disposed in the form of a two dimensional array and having a readout logic. This present invention is directed to the object of projection of high input signal dynamics onto reduced output signal dynamics, and is distinguished by the arrangement of the light-sensitive element of each image cell being connected between one electrode of a first MOS transistor and gate of a second MOS transistor, and by the other electrode of the first MOS transistor being connected to the one pole of a voltage supply source.
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