Ball grid array having reduced mechanical stress

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United States of America Patent

PATENT NO 5598036
SERIAL NO

08490855

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Abstract

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A semiconductor package, including semiconductor dies, a ball grid array, and a printed circuit board, is described. Said package has been designed with a view to minimizing its level of internal mechanical stress. This has been achieved through use of two sets of solder joints that have different melting points. The joints with the higher melting point are positioned in the region, on the ball grid array, where it is known that stress will be a maximum in the finished package. The lower melting point joints occupy the remaining positions on the underside of the ball grid array. Ball grid array and printed circuit board are attached to one another by heating at a temperature that is between the aforementioned two melting points.

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Patent Owner(s)

Patent OwnerAddress
TRANSPACIFIC IP I LTDROOM 1402 14F NO 205 DUNHUA N ROAD SONGSHAN DISTRICT TAIPEI CITY 105

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Inventor(s)

Inventor Name Address # of filed Patents Total Citations
Ho, Tony H Hsin-Chu, TW 5 168

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