Semiconductor integrated circuit device with test mode for testing CPU using external Signal
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United States of America Patent
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Dec 3, 1996
Issued Date -
N/A
app pub date -
Apr 15, 1993
filing date -
Apr 19, 1988
priority date (Note) -
Expired
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Abstract
An output gate means is provided which is capable of outputting individual signals selectively to an internal bus; the individual signals are interchanged among a plurality of functional modules connected to the internal bus which is interfaced with an external circuit. An input gate means is provided which is capable of supplying selectively a signal, input to the internal bus, to a specified functional module in place of an individual signal.
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