Antifuse with silicon spacers
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United States of America Patent
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Nov 5, 1996
Grant Date -
N/A
app pub date -
Mar 31, 1994
filing date -
Mar 31, 1994
priority date (Note) -
Expired
status (Latency Note)
Importance
Abstract
A method and resulting antifuse structure in an integrated circuit include a first metal interconnection layer on a first insulating layer over the substrate of the integrated circuit, a second insulating layer over the first metal interconnection layer. The second insulating layer has a via therein and a programming layer is located in the via. Such programming layer includes a first region on the first metal interconnection layer which is removed from sides of the second insulating layer in the via, and a second region on the sides of the second insulating layer via. The first region has substantially a first thickness, the second region has substantially a second thickness which is greater than the first thickness. Upon programming the antifuse structure, a conducting link forms in the first region of the programming layer.
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