Configurable architecture for serial communication
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United States of America Patent
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Oct 1, 1996
Issued Date -
N/A
app pub date -
Sep 11, 1995
filing date -
May 25, 1990
priority date (Note) -
Expired
status (Latency Note)
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Abstract
A device for coupling a host computer to a serial communications device. A dual port register set is coupled to the CPU bus of a host computer. The dual port registers receive the control signals and data from the host computer. This information is immediately available to be read by a serial communications controller. In this invention, one channel of a two-channel serial communications controller is implemented to receive the parallel data and convert it to serial output. The parallel data is also provided directly to a microprocessor interface for use by a local microprocessor, if desired. The present invention eliminates unneeded conversion steps and reduces the amount of circuitry required to implement serial communications functions.
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