Scrambling system for serial digital video
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United States of America Patent
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Oct 1, 1996
Grant Date -
N/A
app pub date -
Dec 12, 1994
filing date -
Dec 12, 1994
priority date (Note) -
Expired
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Abstract
An improved scrambler for serial digital video that is compatible with SMPTE Standard 259M inserts a detector/dithering circuit between the input serial digital signal and a scrambler. The scrambler's statistics are observed by a pair of up/down counters. One counter monitors the scrambled data prior to NRZI encoding to determine transition density, and the other monitors the NRZI encoder output to determine the relative density of 'ones' and 'zeros' in the scrambled output signal. A pseudorandom generator generates a dither signal which is combined with the least significant bit of selected video words of the input serial digital signal when enabled by the terminal count output from either counter. A complementary descrambler has a similar detector/dithering circuit at its output to restore the original least significant bit of the selected video words. The improved scrambler/descrambler may be implemented in either the serial or the parallel domain. Thus pathological signals are avoided that could create problems within the serial digital video bit stream.
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