Multiplexed multi-write port semiconductor memory
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United States of America Patent
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Aug 6, 1996
Issued Date -
N/A
app pub date -
May 19, 1994
filing date -
Aug 30, 1991
priority date (Note) -
Expired
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Abstract
Write column selection MOSFETs of memory cells MC are coupled with, for example, the earth potential of the circuit. Write column selection signals supplied to these MOSFETs are formed selectively according to the column selection address signal and the write data. Thereby the write column selection MOSFETs of the memory cells MC function as a substantial write means. That is, the write column selection signal lines are used as the data lines at the same time.
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