Monolithic integrated circuit with at least one CMOS field-effect transistor and one npn bipolar transistor
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United States of America Patent
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Jun 11, 1996
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N/A
app pub date -
Jan 12, 1995
filing date -
Mar 5, 1993
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Expired
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Abstract
The invention relates to a method of making a monolithic integrated circuit with at least one CMOS field-effect transistor and one npn bipolar transistor wherein a thin oxide layer is covered with a protective polysilicon layer in both the bipolar-transistor area and the field-effect-transistor area.
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