Importance

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Abstract

A first input-first output type circuit manages m n-bit words using m stages connected in series with first and second non-overlapping clock signals controlling even-numbered and odd numbered ones of the m stages, respectively. A process for controlling the circuit involves a first write step during which each word in a first half of the m words is written into both an odd-numbered stage and a successive even numbered stage so that m/2 of the m words occupy all m of the stages. After the first write step is completed, a second write step begins during which the m/2 words written during the first write step are shifted and stored in the ((m/2)+1)-th through m-th stages. Writing is disabled in each of the m stages beginning with the m-th stage and proceeding successively to the first stage. The m/2 words not written during the first write step are written into those stages not yet disabled in the same manner as in the first write step. At the end of the second write step, each of the m words is stored in a respective one of the m stages. A read step that follows the second write step involves successively shifting words from one stage to another and reading a word from the m-th stage after completion of the shift.

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First Claim